Explore a real capture
A zonal gateway ECU on an NXP S32G3: four Cortex-A53 cores, each with its own job. ChipTrace kept the last 21.55 ms of their execution in an 8 KB buffer, ChipTraceAnalyzer decoded it. Every bar, count and coloured line below comes from that capture.
NXP S32G34× Cortex-A536,650 instructions decoded26 functionsETR buffer, circular
Four cores, one clock
One lane per core, one bar per function, a call it makes one row lower. Click a bar to open the function, anywhere else to move the cursor.
Drag to pan, Ctrl + wheel or pinch to zoom, the strip below to jump.
Where the instructions go
Instructions executed per function, all cores together, and how much of each function's code ran.
The same views on your own SoC, from a capture taken on your board.
MOVE.B training
Learn the trace ChipTrace relies on
The CoreSight units ChipTrace programs, the cores it traces and the SoCs it runs on, each one a MOVE.B course.