For dedicated sessions at your training facilities, content can be tailored to further meet your needs
(Contact us for public workshops)
Certificate of Completion
A Certificate of Completion will be delivered upon completion of the training course
This course aims to describe all debug features offered by ARM CPUs in order to accelerate the debug time.
Both CoreSight architecture and IPs will be studied.
The operation of complex CoreSight units, such as Embedded Trace Macrocell and Cross-Triggering Interface will be clarified through real debug scenario.
Prerequisites and related courses
Familiarity with ARM Cortex CPUs
LS1043A NXP board, Lauterbach Trace32 invasive and non-invasive debug tools
INTRODUCTION TO CORESIGHT
AMBA BUSES USED FOR DEBUG
ARM DEBUG INTERFACE (ADI)- DEBUG PORT (DP)
ARM DEBUG INTERFACE (ADI)- ACCESS PORT (AP)
ARM DEBUG INTERFACE (ADI)- ROM TABLE
SYSTEM TRACE MACROCELL
EMBEDDED LOGIC ANALYZER
ARM V7-AR AND V8-A DEBUG
MOVE.B IS MORE THAN A TRAINING CENTER
Trainers are also experts able to assist customers throughout the design process.
They also provide consulting services, design support and assistance.
Therefore, our trainers contribute to the success of our customers’ industrial projects by leveraging all of the technologies they master and teach.