Reference : ARM_CR_R52
Course families : Processors > Arm CPUs and related technologies (SMMU, AMBA, CoreSight) > V8-R Cortex CPUs
Target Audience : Architects, verification engineers, software developers
Duration : 5 days, 7 hours a day
CORTEX-R52/R52+ OVERVIEW
ARM BASICS
INSTRUCTION PIPELINE
HARDWARE IMPLEMENTATION
SAFETY FEATURES
V8-R VIRTUALIZATION EXTENSIONS
PAGE ATTRIBUTES
MEMORY PROTECTION UNIT
SYSTEM MMU, MMU-500
EXCLUSIVE RESOURCE MANAGEMENT
MEMORY SUBSYSTEM AND TCMs
L1 CACHES
PL310 L2 CACHE
GICv3
GENERIC TIMER
CORESIGHT DEBUG
V8-R INSTRUCTION SET SUMMARY
FLOATING-POINT UNIT
EMBEDDED SOFTWARE DEVELOPMENT
Lectures with supporting slides, demos and case studies
Review and execution of practical examples, provided by MOVE.B, using GCC compiler, Lauterbach Trace32 debugger and ST SR6P7 board.
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
