V8-R Cortex CPUs training courses
Cortex-R52/R52+ and Cortex-R82 training courses (Armv8-R): hypervisor support, two-stage MPU, real-time and functional safety features, for automotive and storage SoCs.
Cortex-R52/R52+ and Cortex-R82 training courses (Armv8-R): hypervisor support, two-stage MPU, real-time and functional safety features, for automotive and storage SoCs.

This course explains the hardware and software architecture of the Cortex-R82 to enable participants to efficiently design an SoC based on this CPU, verify it, and develop low level software, implementing the features offered by the CPU: exceptions, low power modes, cache, MPU, V8-R assembly language.
This course explains the hardware and software architecture of the Cortex-R52 and Cortex-R52+ to enable participants to efficiently design an SoC based on this CPU, verify it, and develop low level software, implementing the features offered by the CPU: exceptions, low power modes, cache, MPU, V8-R assembly language. Differences between Cortex-R52 and Cortex-R52+ are highlighted.