P5040 training course
This course explains the architecture of the P5040 to enable participants to efficiently design a board and implement the integrated memory controllers and peripherals
This course explains the architecture of the P5040 to enable participants to efficiently design a board and implement the integrated memory controllers and peripherals
Board designers, boot and driver software developers
Experience with a processor or DSP is mandatory
See courses POWER_CPU_E5500, CVT_GP_PCIE12, CVT_GP_SRIO, CVT_GP_USB2, CVT_MS_SATA, CVT_MS_EMMC, NET_STD_ETH, NET_STD_PTP and DRAM_DDR3
Based on P5040 board, GCC toolchain and TRACE32 debugger
Lectures with supporting slides, demos and case studies
Review and execution of practical examples, provided by MOVE.B, using GCC compiler and Lauterbach TRACE32 debugger
Board design, schematics review, pre-layout review
DDR3 memory controller initialization from DDR3 device’s data sheet
SoC performance improvement
Bare-metal driver design
Yes. You choose the chapters, how deep each one goes and the boards used in the labs. We send you the programme to review before the session.
Yes. Every attendee receives a certificate of completion of the course.
Usually at your premises. The trainer brings the evaluation boards used in the labs.
Small or large groups: tell us how many engineers will attend when you request the course.
The training manuals in PDF format.
Engineers who follow the vendors' train-the-trainer programmes and work on these devices in their own projects.
Use "Request this course" with the number of attendees, the place and the device of your project. We reply with the programme and agree on the dates with you.