Reference : ARM_CM_M52
Course families : Processors > Arm CPUs and related technologies (SMMU, AMBA, CoreSight)ProcessorsProcessors > Arm CPUs and related technologies (SMMU, AMBA, CoreSight) > V8-M Cortex CPUs
Target Audience : Architects, verification engineers, software developers
Duration : 5 days, 7 hours a day
CORTEX-M52 OVERVIEW
INSTRUCTION PIPELINE
MEMORY SUBSYSTEM, TCMs
MEMORY SUBSYSTEM, CACHES
MEMORY MODEL
MEMORY PROTECTION UNITS
MEMORY AUTHENTICATION UNIT (MAU), IDAU, SAU AND TGU
SOFTWARE SECURITY FRAMEWORK
EXCEPTION MECHANISM
LOW POWER MODES
CMSIS
EXCLUSIVE RESOURCE MANAGEMENT
RELIABILITY, AVAILABILITY, AND SERVICEABILITY (RAS) EXTENSION SUPPORT
ARM V8.1-M MAINLINE PROGRAMMING
DEBUG
EFFICIENT CODING GUIDELINES
EXTENSION PROCESSING UNIT
MVE HELIUM™ INSTRUCTIONS
Lectures with supporting slides, use of projector
Review and execution of practical examples, provided by MOVE.B, using GCC toolchain and Lauterbach Trace32 simulator
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
CORTEX®-M35P CORTEX®-M55 