Stellar SR6P7 training course
Learning objectives This course explains the architecture of the SR6P7 to enable participants to efficiently design a board and implement the integrated memory controllers and peripherals.
Learning objectives This course explains the architecture of the SR6P7 to enable participants to efficiently design a board and implement the integrated memory controllers and peripherals.
Board designers, Software developers
Prerequisites and related courses Experience with a processor or DSP is mandatory.
See courses ARM_CR_R52, ARM_CM_M4, CVT_AA_CAN, CVT_MS_EMMC, CVT_GP_HYPERBUS, NET_STD_PTP and NET_STD_ETH.
Based on SR6P7 evaluation board, GCC toolchain and TRACE32 debugger.
Alternating lectures, trainer-driven hands-on practical examples, group interactions with the trainer, and self-reflection time.
Board design, schematics review, pre-layout review.
SoC performance improvement.
Bare-metal driver design.
Yes. You choose the chapters, how deep each one goes and the boards used in the labs. We send you the programme to review before the session.
Yes. Every attendee receives a certificate of completion of the course.
Usually at your premises. The trainer brings the evaluation boards used in the labs.
Small or large groups: tell us how many engineers will attend when you request the course.
The training manuals in PDF format.
Engineers who follow the vendors' train-the-trainer programmes and work on these devices in their own projects.
Use "Request this course" with the number of attendees, the place and the device of your project. We reply with the programme and agree on the dates with you.