Reference : CVT_GP_USB4
Course families : Connectivity > General purpose buses
Target Audience : Architects, board designers, verification engineers, validation engineers, firmware developers
Duration : 3 days, 7 hours a day
ARCHITECTURAL OVERVIEW
ELECTRICAL LAYER
LOGICAL LAYER
TRANSPORT LAYER
CONFIGURATION LAYER
TIME SYNCHRONIZATION
CONFIGURATION SPACES
USB3 TUNNELING
DISPLAY PORT TUNNELING
PCI EXPRESS TUNNELING
HOST INTERFACE
Lectures with supporting slides, use of projector.
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
USB TYPE-C POWER DELIVERY SERIAL RAPIDIO SRIO 4.1