Reference : ARM_CM_M33
Course families : Processors > Arm CPUs and related technologies (SMMU, AMBA, CoreSight) > V8-M Cortex CPUs
Target Audience : Architects, verification engineers, software developers
Duration : 5 days, 7 hours a day
CORTEX-M33 OVERVIEW
PIPELINE AND BUS MATRIX
INTRODUCTION TO V8-M ARCHITECTURE
MEMORY MODEL
SECURITY ATTRIBUTION UNIT (SAU) AND IMPLEMENTATION DEFINED ATTRIBUTION UNIT (IDAU)
MEMORY PROTECTION UNITS
SOFTWARE SECURITY FRAMEWORK
EXCEPTION MECHANISM
LOW POWER MODES
ARM V8-M MAINLINE PROGRAMMING
CMSIS
EXCLUSIVE RESOURCE MANAGEMENT
DEBUG
EMBEDDED SOFTWARE DESIGN
EFFICIENT CODING GUIDELINES
SIMD INSTRUCTIONS
FLOATING-POINT UNIT
Lectures with supporting slides, demos and case studies
Review and execution of practical examples, provided by MOVE.B, using Keil, IAR or STM32CubeIDE
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
CORTEX®-M23 CORTEX®-M35P 