Reference : CVT_MS_UFS
Course families : Connectivity > Mass Storage interfaces
Target Audience : Architects, board designers, verification engineers, firmware developers
Duration : 3 days, 7 hours a day
OVERVIEW OF UFS
M-PHY ARCHITECTURE AND OPERATION
M-PHY ANALOG PART
M-PHY PROTOCOL INTERFACE
REFERENCE M-PHY MODULE INTERFACE (RMMI)
OVERVIEW OF UNIPRO
UNIPRO PHY ADAPTER LAYER (L1.5)
UNIPRO PHY ADAPTER LAYER (L1.5)
UNIPRO LINK LAYER (L2)
UNIPRO NETWORK LAYER (L3)
UFS INTERCONNECT (UIC) AND UFS POWER MODES
UFS TRANSPORT LAYER (UTP)
SCSI COMMANDS
SECURITY FEATURES
FUNCTIONAL DESCRIPTION
HOST CONTROLLER INTERFACE
HOST PERFORMANCE BOOSTER
Lectures with supporting slides, demos and case studies
UFS traffic capture with Teledyne Lecroy analyzer complements the theoretical explanations
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
SERIAL-ATA SATA 3.4 UHS 3.0