Reference : NXP_ARM_S32V234
Course families : NXP CPUs, MCUs and MPUs > NXP Arm MPUs > S32 series
Target Audience : Board designers, boot and driver software developers
Duration : 4 days, 7 hours a day
ARCHITECTURE OF S32V234
INTERCONNECT
ARM CPUs INTEGRATION
POWER, CLOCKING AND RESET
SAFETY MODULES
SYSTEM MODULES
TIMERS
PCIE BRIDGE
GIGA ETHERNET MAC
MEMORY INTERFACES
OTHER COMMUNICATION MODULES
GRAPHIC MODULES
VISION SUBSYSTEM MODULES
Lectures with supporting slides, demos and case studies
Review and execution of practical examples, provided by MOVE.B, using GCC compiler and Lauterbach Trace32 debugger
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
