Reference : CVT_MM_CSI2
Course families : Connectivity > Multimedia interfaces
Target Audience : Architects, board designers, verification engineers, firmware developers
Duration : 2 day, 7 hours a day
OVERVIEW
CAMERA CONTROL INTERFACE
D-PHY 3.5
C-PHY 2.1
PHY PROTOCOL INTERFACE
CSI-2 ARCHITECTURE
LOW LEVEL PROTOCOL
LATENCY REDUCTION AND TRANSPORT EFFICIENCY
UNIFIED SERIAL LINK
DATA SCRAMBLING
SMART REGION OF INTEREST (SROI)
FRAME FORMATS
ALWAYS-ON SENTINEL CONDUIT (AOSC)
TESTING
Lectures with supporting slides, demos and case studies
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
DISPLAY SERIAL INTERFACE DSI CAMERA SERIAL INTERFACE CSI-3