JACINTO™7 TDA4
Reference : TI_JAC_TDA4
Course families : Processors > Texas Instruments Arm and DSP MCUs & MPUs
Target Audience : Board designers, Software developers
Duration : 6 days, 7 hours a day
Reference : TI_JAC_TDA4
Course families : Processors > Texas Instruments Arm and DSP MCUs & MPUs
Target Audience : Board designers, Software developers
Duration : 6 days, 7 hours a day
TDA4 SOC ARCHITECTURE
ARM CORTEX-A72 INTEGRATION
C71 DSP INTEGRATION
ARM CORTEX-R5F INTEGRATION
INTERRUPT HANDLING
MULTICORE SHARED MEMORY CONTROLLER (MSMC)
POWER SUPPLIES AND RESET
CLOCKING
BOOT
SERDES
LPDDR4 CONTROLLER
GENERAL PURPOSE MEMORY CONTROLLER
MMC / SD INTERFACE
UFS 2.1 INTERFACE
OCTOSPI / HYPERBUS
USB 3.1 SUBSYSTEM
PCIE BRIDGE
OVERVIEW OF DATA MOUVEMENT ARCHITECTURE
UNIFIED DMA CONTROLLER (UDMA)
DATA ROUTING UNIT
PERIPHERAL DMA (PDMA)
COMMON PLATFORM ETHERNET SWITCH (CPSW)
LOW SPEED PERIPHERALS
SAFETY FEATURES
SECURITY MANAGEMENT SUBSYSTEM
GRAPHICS AND VIDEO ACCELERATORS
CAMERA SUBSYSTEM
DISPLAY SUBSYSTEM
AUDIO MODULES
Alternating lectures, trainer-driven hands-on practical examples, group interactions with the trainer, and self-reflection time.
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content