Reference : CVT_MS_EMMC
Course families : Connectivity > Mass Storage interfaces
Target Audience : Architects, board designers, verification engineers, firmware developers
Duration : 2 days, 7 hours a day
OVERVIEW
PHYSICAL LAYER
EMMC STATE MACHINE
PROTOCOL DESCRIPTION
NXP ULTRA SECURED DIGITAL HOST CONTROLLER (uSDHC) FUNCTIONAL DESCRIPTION
Lectures with supporting slides, demos and case studies
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
