Reference : ARM_CM_M0P
Course families : Processors > Arm CPUs and related technologies (SMMU, AMBA, CoreSight) > V6-M Cortex CPUs
Target Audience : Architects, verification engineers, software developers
Duration : 3 days, 7 hours a day
CORTEX-M0+ OVERVIEW
PIPELINE AND BUS MATRIX
ARM V6-M PROGRAMMING
CMSIS
EXCEPTION MECHANISM
LOW POWER MODES
DEBUG
MEMORY PROTECTION UNIT
EMBEDDED SOFTWARE DESIGN
AHB-LITE, ADVANCED HIGH PERFORMANCE BUS
APB3.0, ADVANCED PERIPHERAL BUS
Lectures with supporting slides, demos and case studies
Review and execution of practical examples, provided by MOVE.B, using Keil, IAR or STM32CubeIDE
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
CORTEX®-M0