NVME 2.2
Reference : CVT_MS_NVME
Course families : Connectivity > Mass Storage interfaces
Target Audience : Architects, board designers, verification engineers, firmware developers
Duration : 3 days, 7 hours a day
Reference : CVT_MS_NVME
Course families : Connectivity > Mass Storage interfaces
Target Audience : Architects, board designers, verification engineers, firmware developers
Duration : 3 days, 7 hours a day
OVERVIEW OF NVM EXPRESS 2.2
CONTROLLER ARCHITECTURE
MEMORY STRUCTURES
DIRECTIVES
FEATURES
NEW FEATURES OFFERED BY NVME 2.1 AND NVME 2.2
PCIE SUBLAYER
CONTROLLER REGISTERS
NVME ADMIN COMMAND SET DETAIL
NVM COMMAND SET DETAIL
ZONED NAMESPACE COMMAND SET DETAIL
KEY VALUE COMMAND SET DETAIL
NVM EXPRESS OVER FABRICS
NVM EXPRESS MANAGEMENT INTERFACE
SCSI TRANSLATION REFERENCE
Lectures with supporting slides, demos and case studies
Analysis of NVME traces obtained with Teledyne Lecroy analyzer complements the theoretical explanations
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
EMMC 5.1 SERIAL-ATA SATA 3.4