Reference : CVT_GP_MIPI_APHY
Course families : Connectivity > MIPI PHYs
Target Audience : Architects, board designers, verification engineers, firmware developers
Duration : 2 day, 7 hours a day
OVERVIEW
ARCHITECTURE
INTERCONNECT
EMC ENVIRONMENTAL CONDITIONS
PHY LAYER
PHYSICAL MEDIA DEPENDENT (PMD)
PHYSICAL CODING SUBLAYER (PCS)
MODES OF OPERATION
DATA LINK LAYER
A-PHY CONTROL AND MANAGEMENT DATABASE (ACMD) AND PROTOCOL (ACMP)
POWER OVER A-PHY
PROTOCOL ADAPTATION LAYERs (PALs)
Alternating lectures, group interactions with the trainer, and self-reflection time.
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content
