DDR5
Reference : DRAM_DDR5
Course families : DRAM memories > DDR memories
Target Audience : Architects, board designers, verification engineers, validation engineers
Duration : 3 days, 7 hours a day
Reference : DRAM_DDR5
Course families : DRAM memories > DDR memories
Target Audience : Architects, board designers, verification engineers, validation engineers
Duration : 3 days, 7 hours a day
INTRODUCTION TO DRAM
DDR1, DDR2, DDR3, DDR4 REVIEW
DDR5 PACKAGE PINOUT & ADDRESSING
DDR5 NEW FEATURES
ON-DIE TERMINATION
FUNCTIONAL DESCRIPTION
TRAINING AND CALIBRATION PROCEDURES
ROW OPERATION
READ AND WRITE TRANSACTIONS
REFRESH AND LOW-POWER MODES
ELECTRICAL CHARACTERISTICS
SAFETY FEATURES
TESTING AND CHARACTERIZATION
Lectures with supporting slides, demos and case studies.
Practical uses cases complement the theoretical explanations.
Trainees will participate in quizzes and learning checks throughout the course.
Each trainee will fill out and return a training evaluation form upon completion of the training course
Our trainers regularly attend train-the-trainer courses with our partners to continuously improve their technical skills and knowledge on the latest components, technologies, and upcoming releases
Each attendee will receive a Participant Guide (in a pdf format)
Learners should bring their laptops to the course; they will be able to navigate in the presentation and access the training content