For dedicated sessions at your training facilities, content can be tailored to further meet your needs
(Contact us for public workshops)
Certificate of Completion
A Certificate of Completion will be delivered upon completion of the training course
This course explains the hardware and software architecture of the Cortex-M CPUs to enable participants to efficiently design SoCs based on these CPUs, verify them, and develop low level software, implementing the features offered by the CPU: exceptions, low power modes, MPU, assembly language. It does not describe a particular Cortex-M CPU, but provide generic information that will be useful to implement any Cortex-M CPU. Architectures V6-M, V7-M, V8-M and V8.1-M are covered.
BOOTING A CORTEX-M CPU
EXCLUSIVE RESOURCE MANAGEMENT
LOW POWER MODES
INVASIVE AND NON-INVASIVE DEBUG
MEMORY PROTECTION UNIT
INTRODUCTION TO V8-M SECURITY FEATURES
SECURITY ATTRIBUTION UNIT (SAU) AND IMPLEMENTATION DEFINED ATTRIBUTION UNIT (IDAU)
SOFTWARE SECURITY FRAMEWORK
V8.1-M NEW INSTRUCTIONS
SECURITY RELATED ENHANCEMENTS
RELIABILITY, AVAILABILITY, AND SERVICEABILITY (RAS) EXTENSION SUPPORT
INTRODUCTION TO MACHINE LEARNING
MVE HELIUM™ INSTRUCTIONS
FLOATING POINT PROCESSING ENHANCEMENTS
MOVE.B IS MORE THAN A TRAINING CENTER
Trainers are also experts able to assist customers throughout the design process.
They also provide consulting services, design support and assistance.
Therefore, our trainers contribute to the success of our customers’ industrial projects by leveraging all of the technologies they master and teach.